Pulse or digital communications – Receivers
Reexamination Certificate
2000-07-05
2004-10-05
Tse, Young T. (Department: 2634)
Pulse or digital communications
Receivers
C375S257000
Reexamination Certificate
active
06801584
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to electrical circuits for transmitting electrical signals between a source and a destination. More specifically, the present invention relates to a method and an apparatus for transferring electrical signals between a transmitter and a receiver that uses a differential signal in adjusting a slice voltage for a single-ended signal.
2. Related Art
As computer systems continue to increase in speed at an exponential rate, timing margins for circuitry within the computer systems are becoming tighter. It is consequently becoming increasingly more important to ensure that data signals are precisely aligned with corresponding clock signals that are used to capture the data signals.
Data is commonly transferred between computer system components through either a differential signal or a single-ended signal. A differential signal includes a first signal line and a second signal line that are driven to different voltage values by a differential driver. This differential signal has a first value (such as a logical one) if the first signal line has a higher voltage than the second signal line, and a second value (such as a logical zero) if the second signal line has a higher voltage than the first signal line.
In contrast, a single-ended signal includes only a single signal line. This single signal line has a first value (such as a logical one) if the single signal line has a higher voltage than a reference “slice voltage.” The single signal line has a second value (such as a logical zero) if the single signal line has a lower voltage than the slice voltage.
As timing margins become increasingly tighter, system designers are beginning to use differential signals instead of single-ended signals because differential signals tend to be more reliable in transferring data at higher clock frequencies.
Unfortunately, using differential signals doubles the number of signal lines that must be routed between components in a computer system. This significantly increases the number of wires and pins that are required to accommodate these signals.
These additional wires and pins can create a number of problems. (1) Routing large numbers of signal lines between computer system components across a printed circuit board tends to increase the separation between chips on the printed circuit board. This increases propagation delay, and can hence decrease clock speed. (2) Connectors with larger numbers of pins tend to be less reliable, and are more likely to fail. (3) Routing larger numbers of signal lines can require more chips to be used for bridging and routing signals between computer system components.
One way to alleviate some of the above-mentioned problems is to use differential signals for time-critical signals, and to use single-ended signals for less time-critical signals. For example, it is possible to use a differential signal to carry a system clock signal, while single-ended signals are used to carry data values.
One drawback to implementing such a hybrid system is that the slice voltage used in receiving single-ended signals does not change in the same way that a corresponding differential clock signal changes. Note that the differential clock signal and the slice voltage can change over time as a result of changes in environmental factors, such as temperature, humidity, vibration and power supply voltage.
What is needed is a method and an apparatus that adjusts a slice voltage so that the slice voltage tracks a differential signal as the slice voltage and the differential signal change over time.
SUMMARY
One embodiment of the present invention provides a system for receiving electrical signals that uses a differential signal in adjusting a slice voltage for a single-ended signal between the source and the destination. This differential signal includes a first signal line and a second signal line, wherein a first value is represented by the first signal line being at a higher voltage than the second signal line, and a second value is represented by the first signal line being at a lower voltage than the second signal line. The system operates by receiving the differential signal at the destination and comparing the differential signal against the slice voltage to obtain a comparison result. The system uses the comparison result to adjust the slice voltage, and also uses the slice voltage as a reference signal in capturing the single-ended signal. Note that this single-ended signal includes a single signal line, wherein the first value is represented by the single signal line having a voltage above the slice voltage, and the second value is represented by the single signal line having a voltage below the slice voltage.
In one embodiment of the present invention, comparing the differential signal against the slice voltage involves comparing an intersection voltage of the differential signal against the slice voltage. This intersection voltage is a voltage at which the first signal line and the second signal line cross during a transition between the first value and the second value on the differential signal.
In one embodiment of the present invention, using the comparison result to adjust the slice voltage includes using a feedback loop to adjust the slice voltage.
In one embodiment of the present invention, the system uses the slice voltage as a reference signal in capturing a plurality of single-ended signals at a plurality of receivers at the destination.
In one embodiment of the present invention, the system compares the differential signal against the slice voltage by feeding the first signal line and the second signal line of the differential signal into a first differential amplifier. The system uses a first RC integrator to integrate an output of the first differential amplifier to produce a first intermediate signal. The system also feeds the first signal line of the differential signal and the slice voltage through a second differential amplifier, and use a second RC integrator to integrate an output of the second differential amplifier to produce a second intermediate signal. Next, the system feeds the first intermediate signal and the second intermediate signal through a third differential amplifier to produce a third intermediate signal, and then feeds the third intermediate signal and a reference voltage through a fourth differential amplifier to produce the slice voltage.
In one embodiment of the present invention, the first RC integrator and the second RC integrator have long time constants when compared against a switching frequency of the differential signal.
In one embodiment of the present invention, the differential signal is a clock signal that periodically alternates between the first value and the second value.
In one embodiment of the present invention, the system uses the clock signal to clock circuitry that receives the single-ended signal.
In one embodiment of the present invention, comparing the differential signal against the slice voltage involves analyzing a pulse width of a signal produced by capturing the first signal line of the differential signal using the slice voltage as a reference voltage.
REFERENCES:
patent: 6151648 (2000-11-01), Haq
patent: 6154498 (2000-11-01), Dabral et al.
patent: 6424177 (2002-07-01), Hairapetian
patent: 6600374 (2003-07-01), Nguyen et al.
Ahn Sam K.
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
Tse Young T.
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