User selectable banks for DRAM

Details User selectable banks for DRAM User selectable banks for DRAM

2011-08-09

2011-08-09

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S230010, C365S230060, C365S230080

Reexamination Certificate

active

07995420

ABSTRACT:
A memory device includes a configurable array of memory cells. A number of array banks is configured based upon data stored in a mode register or decoded by logic circuitry. The memory device remains a full capacity memory, regardless of the number of array banks. Memory address decoding circuitry is adjusted to route address signals to or from a bank address decoder based upon the number of array banks selected.

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