Patent
1997-06-03
1999-02-23
Ray, Gopal C.
395735, 395869, G06F 946, G06F 1314
Patent
active
058753427
ABSTRACT:
A method and apparatus for implementing a user programmable interrupt mask and timeout count. A master mask latch receives non-privileged instructions which alternatively cause the latch to disable and enable interrupt requests for the processor. The non-privileged disable interrupts instruction additionally causes the initiation of a timeout counter for defining the duration of an interval for which interrupt requests may be disabled. The non-privileged enable interrupts instruction additionally terminates the count of the timeout counter. If the timeout counter is not halted within the defined interval, a system error interrupt is generated, interrupts are re-enabled and the counter is halted. In a further embodiment, the disable interrupts instruction may be incorporated into a fetch and hold instruction and the enable interrupts instruction may be incorporated into a store and release instruction to facilitate atomic read, modify, write operations.
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"Enterprise Systems Architecture/390 Principles of Operation", IBM Publication, SA22-7201-04, Jun. 1997.
Ehrlich Marc. A.
International Business Machines - Corporation
Ray Gopal C.
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