Use of three phase clock in sigma delta modulator to...

Details Use of three phase clock in sigma delta modulator to... Use of three phase clock in sigma delta modulator to...

2011-04-12

2011-04-12

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000, C341S144000

Reexamination Certificate

active

07924194

ABSTRACT:
A differential sigma delta modulator operates by modulating an input signal by intermittently coupling a reference signal to the input signal using one or more switches controlled by one or more feedback signals and a respective one or more non-overlapping clock signals. The modulated input signal is integrated using an integration capacitor to form an integrated value and the integrated value is compared to a threshold to form the one or more feedback signals. Parasitic capacitance of the one or more switches is initialized to an initial value prior to each intermittent coupling of the reference signal to the input signal using another non-overlapping clock signal.

REFERENCES:
patent: 6501322 (2002-12-01), Bidenbach et al.
patent: 6614375 (2003-09-01), Hochschild
patent: 2005/0116850 (2005-06-01), Hezar et al.
Abhijit Das, et al., “A 4th-order 86dB CT Delta-Sigma ADC with Two Amplifiers in 90nm CMOS”, 2005 IEEE International Solid-State Circuits Conference, , Feb. 9, 2005, Salon 7, Session 27, Filters and Continous-Time Delta-Sigma Converters, 27.3, pp. 496, 497 & 612.

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