Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-12-21
2009-02-03
Williams, Alexander O (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257SE23145, C257SE23144, C257SE23167, C257SE21581, C257SE21252, C257SE21002, C438S253000, C438S396000
Reexamination Certificate
active
07485963
ABSTRACT:
An embodiment of the invention is a method of manufacturing an integrated circuit. The method includes forming a capping layer of a back end structure (step706), drilling an extraction line from the capping layer to an inter-metal dielectric layer (step708), performing a supercritical fluid process to remove portions of the inter-metal dielectric layer that are coupled to the extraction line (step710): thereby forming a denuded dielectric region. Another embodiment of the invention is an integrated circuit2having a back-end structure5coupled to a front-end structure4. The back-end structure5having a first metal level22. The first metal level22having metal interconnects15and an inter-metal dielectric layer19. The back-end structure5further containing an extraction line24and a denuded dielectric region25coupled to the extraction line24.
REFERENCES:
patent: 6329260 (2001-12-01), DeJong et al.
patent: 7115467 (2006-10-01), Ajmera et al.
Grunow Stephan
Matz Phillip D.
Papa Rao Satyavolu S.
Brady III Wade J.
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Williams Alexander O
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