Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2001-07-19
2004-07-20
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
With measuring or testing
C438S692000, C216S084000
Reexamination Certificate
active
06764868
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is generally directed to the field of semiconductor manufacturing, and, more particularly, to the use of slurry waste composition to determine the amount of metal removed during chemical mechanical polishing, and a system for accomplishing same.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the operating speed of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for computers and electronic devices that operate at increasingly greater speeds. This demand for increased speed has resulted in a continual reduction in the size of semiconductor devices, e.g., transistors. That is, many components of a typical field effect transistor (FET), e.g., channel length, junction depths, gate insulation thickness, and the like, are reduced. For example, all other things being equal, the smaller the channel length of the transistor, the faster the transistor will operate. Thus, there is a constant drive to reduce the size, or scale, of the components of a typical transistor to increase the overall speed of the transistor, as well as integrated circuit devices incorporating such transistors.
In modern integrated circuit devices, millions of transistors are formed above a surface of a semiconducting substrate. To perform their intended functions, these transistors, or groups of transistors, are electrically coupled together by many levels of conductive interconnections, i.e., conductive metal lines and plugs. These conductive lines and plugs allow electrical signals to propagate throughout the integrated circuit device. In general, these conductive interconnections are formed in layers of insulating material, e.g., silicon dioxide, HSQ, or other materials that may have a dielectric constant less than approximately 5.0. The insulating materials electrically isolate the various conductive interconnections and tend to reduce capacitive coupling between adjacent metal lines when the integrated circuit device is in operation.
As the demand for high performance integrated circuit devices continues to increase, circuit designers and manufacturers look for ways to improve device performance. Recently, copper has become the material of choice for conductive interconnections for high performance integrated circuit devices, e.g., microprocessors, due to its lower resistance as compared to, for example, aluminum.
Conductive interconnections comprised of copper may be formed using a variety of process flows, e.g., single damascene, dual damascene, etc. For example, a layer of insulating material may be formed on or above a semiconducting substrate. Thereafter, a plurality of openings may be formed in the layer of insulating material using known photolithographic and etching techniques. Then, a relatively thin barrier metal layer comprised of, for example, tantalum, is conformally deposited above the insulating layer and in the openings in the insulating layer. Next, a relatively thin layer of copper, a so-called copper seed layer, is deposited on the barrier metal layer. A much thicker layer of copper is then formed by using known electroplating techniques. This final layer of copper will fill the remaining portions of the openings in the insulating layer, and have an upper surface that extends above the surface of the insulating layer.
Ultimately, one or more chemical mechanical polishing (CMP) operations will be performed to remove the excess copper and barrier layer material from above the surface of the insulating layer. This process results in the definition of a plurality of conductive interconnections, e.g., conductive lines or plugs, or a combination of both, positioned within the openings in the insulating layer.
As set forth above, chemical mechanical polishing is an important process as it relates to the formation of conductive interconnections comprised of copper in modern integrated circuit devices. A variety of chemical mechanical polishing tools are commercially available. In all such systems, the object is to polish the surface of a process layer, e.g., copper, with a polishing pad in the presence of a polishing slurry. In general, chemical mechanical polishing involves the selective removal of all or portions of the process layer or film from the wafer through chemical reactivity of the polishing slurry used during the process, and the mechanical abrasion of the process layer due to its contact with the polishing pad. For example, the chemical component of the CMP process is dependent on the chemistry, concentration and pH of the polishing slurry. Furthermore, the mechanical abrasion is dependent on, among other things, the slurry particle size and concentration, polishing pad hardness and surface roughness, pad pressure, and the rotational speeds of the wafer and the pad. All of these variables tend to make accurately controlling CMP prossesses difficult.
During the course of forming conductive interconnections using a CMP process, it may be important to be able to determine the amount of metal, e.g., copper, removed. More particularly, it may be important to determine the thickness of the layer removed during the CMP process. The ability to accurately determine this information may assist in enhancing process yield and accurately controlling and terminating CMP processes.
The present invention is directed to a method that may solve, or at least reduce, some or all of the aforementioned problems.
SUMMARY OF THE INVENTION
In general, the present invention is directed to a method of using slurry waste composition to determine the amount of metal removed during chemical mechanical polishing processes, and a system for accomplishing same. In one embodiment, the method comprises providing a substrate having a metal layer formed thereabove, performing a chemical mechanical polishing process on the layer of metal in the presence of a polishing slurry, measuring at least a concentration of a material comprising the metal layer in the polishing slurry used during said polishing process after at least some of said polishing process has been performed, and determining a thickness of the layer of metal removed during the polishing process based upon at least the measured concentration of the material comprising the metal layer. In one illustrative embodiment, the determination of the thickness of the layer removed is performed by accessing a database comprised of data correlating a measured concentration of a material in a volume of waste slurry to a removed thickness of the material. In other embodiments, the method comprises calculating the removed thickness of the material based upon at least the measured concentration of the process layer material in the waste slurry.
In another embodiment, the present invention is directed to a system that is comprised of a chemical mechanical polishing tool for performing a chemical mechanical polishing process on a metal layer in the presence of a polishing slurry, a concentration monitor for measuring a concentration of a material comprising the metal layer in the polishing slurry used during said polishing process after at least some of the polishing process has been performed, and a controller for receiving the measured concentration and determining a thickness of the layer of metal removed during the polishing process based upon at least the measured concentration of the material comprising the layer of metal.
REFERENCES:
patent: 5399234 (1995-03-01), Yu et al.
patent: 5637185 (1997-06-01), Murarka et al.
patent: 5876266 (1999-03-01), Miller et al.
patent: 6379538 (2002-04-01), Corlett et al.
Hewett Joyce S. Oey
Pasadyn Alexander J.
Advanced Micro Devices , Inc.
Norton Nadine G.
Umez-Eronini Lynette T.
Williams Morgan & Amerson P.C.
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