Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-02-28
2002-09-17
Paladini, Albert W. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C361S767000
Reexamination Certificate
active
06452116
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to electronic circuit packages such as printed wiring boards and laminate chip carriers with a blind via used in place of a land connected to a plated through hole. The blind via then connects one or more internal layers of the electronic circuit package to a surface land.
BACKGROUND OF THE INVENTION
Electronic circuits contain many (sometimes millions) of components such as resistors, capacitors, inductors, diodes, electro-mechanical switches, and transistors. High density packaging of electronic components is particularly important to allow fast access to large amounts of data in computers. High density electronic circuit packages also are important in high frequency devices and communications devices. The components are connected to form circuits and circuits are connected to form functioning devices. The connections perform power and signal distribution. In a multi-layer electronic circuit package, some layers of the package serve as conductors and other layers serve as signal planes, depending on the operational requirements of the device. The devices require mechanical support and structural protection. The circuits themselves require electrical energy to function. The functioning devices, however, produce heat, or thermal energy which must be dissipated so that the devices do not stop functioning. Moreover, while high density packaging of a number of components can improve performance of the device, the heat produced by the power-consuming components can be such that performance and reliability of the devices is adversely impacted. The adverse impact arises from electrical problems such as increased resistivity and mechanical problems such as thermal stress caused by increased heat.
Electronic circuit packages, such as chips, modules, circuit cards, circuit boards, and combinations of these, thus must meet a number of requirements for optimum performance. The package must be structurally sturdy enough to support and protect the components and the wiring. In addition, the package must be capable of dissipating heat and must have a coefficient of thermal expansion that is compatible with that of the components. Finally, to be commercially useful, the package should be inexpensive to produce and easy to manufacture.
High density packages necessarily involve increased wiring density and thinner dielectric coatings between layers in a multi-layer electronic circuit package. The layers in a multi-layer package typically are electrically connected by vias and through-holes. The term “via” is used for a conductive pathway between adjacent layers in a multi-layer electronic circuit package. The term “through-hole” is used for a conductive pathway that extends to a non-adjacent layer.
Presently, a widely used technique for achieving such electrical connection, is to provide vias having a metal plated on the walls of the vias. However, plating is a relatively expensive process including the processing steps of cleaning, seeding or catalyzing the walls and then plating with the desired metal such as copper. Because of the relative expense associated with plating, alternatives have been suggested to provide electrical conductivity in unplated vias, whether through-holes or blind vias. The alternative methods include providing solder-paste-filled blind vias, solder balls in blind vias, solder-filled through-holes, solder rings, and copper powder mixed into solder paste. Each of these methods depend on the solder bridging unplated/unsoldered prepreg.
For high density packages the through-holes are increasingly narrow in diameter and the through-holes in each layer must be aligned precisely. The through-holes and vias are likely to be plated at least where they connect at either end. The routing of lines in a dense electronic circuit package is made more difficult by surface joining features that typically are formed as lands connected to plated through-holes or vias.
The land and through hole/via features also limit the density of the interconnect pattern. More particularly, each conductor site must be separated from other sites by a certain amount of dielectric material which limits the density of the sites.
SUMMARY OF THE INVENTION
It is an object of this invention to provide an electronic circuit package with blind vias forming electrical connections between a first conductive layer and a second conductive layer.
A further object of this invention is to provide an electronic circuit package that uses blind vias manufactured to specifications such that the amount of solder from ball grid array joints that enter the blind vias is limited such that the joint is not starved for lack of solder.
A third object of this invention is to provide methods of fabrication of electronic circuit packages with blind vias forming electrical connections between a first conductive layer and a second conductive layer.
Accordingly, a method is provided for connecting two conductive layers in an electronic circuit package comprising the steps of placing one or more blind vias in a first substrate positioned on top of a first conductor; placing one or more blind vias in a second substrate positioned under a second conductor; attaching one or more signal lines to one or more of the one or more blind vias; and assembling ball grid array components such that the first conductor is electrically connected to the second conductor using the blind vias. Also claimed is an electronic circuit package incorporating the blind vias for electrical connection between conductive layers in accordance with the present invention.
It is an advantage of the present invention that the blind vias provide electrical connection between two conductive layers of the electronic circuit package.
It is a further advantage that the blind vias are manufactured to be compatible with the use of a ball grid array that uses solder for the joints of the array.
It is a further advantage of the invention that the need for lands separate from the through-holes/vias is eliminated thereby permitting higher density of electrical connections.
Other features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiment of the invention taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4617730 (1986-10-01), Geldermans et al.
patent: 5189261 (1993-02-01), Alexander et al.
patent: 5329423 (1994-07-01), Scholz
patent: 5400220 (1995-03-01), Swamy
patent: 5456004 (1995-10-01), Swamy
patent: 5459287 (1995-10-01), Swamy
patent: 5463191 (1995-10-01), Bell et al.
patent: 5487218 (1996-01-01), Bhatt et al.
patent: 5489750 (1996-02-01), Sakemi et al.
patent: 5493077 (1996-02-01), Demura
patent: 5495665 (1996-03-01), Carpenter et al.
patent: 5509200 (1996-04-01), Frankeny et al.
patent: 5557844 (1996-09-01), Bhatt et al.
Armezzani Gregg J.
Desai Kishor V.
Perkins Jeffrey S.
Pessarchick John J.
Fraley Lawrence R.
International Business Machines - Corporation
Paladini Albert W.
LandOfFree
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