Use of an internal on-chip inductor for electrostatic...

Details Use of an internal on-chip inductor for electrostatic... Use of an internal on-chip inductor for electrostatic...

2008-09-16

2008-09-16

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Making passive device

C257SE21022

Reexamination Certificate

active

11545251

ABSTRACT:
A method for forming and packaging an integrated circuit having a plurality of circuit components on a semi conductive substrate die. The plurality of circuit components include at least one active component that operates on an information signal, a tuning node coupled to the at least one active component, an Electro Static Discharge (ESD) protection inductor, and a chip pad. The chip pad couples to the tuning node. The ESD protection inductor communicatively couples between the tuning node and a rail formed on the semi conductive substrate die. The ESD protection inductor provides ESD protection prior to packaging of the semi conductive substrate die or in some cases prior to the installation of the packaged die on a PC board or the equivalent. The bond wire couples between the chip pad and a package pad and serves as a tuning inductor for the circuit.

REFERENCES:
patent: 6977420 (2005-12-01), Pasqualini
patent: 7002220 (2006-02-01), Jin et al.
patent: 7009308 (2006-03-01), Jin et al.

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