Printing – Stenciling – Processes
Reexamination Certificate
2000-08-30
2002-08-27
Yan, Ren (Department: 2854)
Printing
Stenciling
Processes
C101S123000
Reexamination Certificate
active
06439115
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to microelectronic devices and the manufacturing thereof, including, but not limited to, the manufacturing of field emission, or effect, display (FED) devices. More particularly, this invention relates to the screen printing of screen printable substances onto various substrates to form, for example, electrically conductive traces, or conductor elements, on selected components of microelectronic devices such as, but not limited to, substrates incorporated within FED devices.
2. Background of the Related Art
Screen printing is frequently used within the microelectronic industry in the manufacturing of a wide variety of microelectronic components and products. For example, various electrical circuits, or traces, can be formed on a selected planar, rigid substrate by screen printing to provide a wide selection of electrical circuitry and circuit functions. Such screen printed electrical circuits can include, for example, conductive elements and paths, resistive elements and paths, as well as various elements that have certain preselected insulative or dielectric characteristics or qualities. Thus, the term “conductive” as used herein broadly refers to any material capable of conducting electricity.
In the fabricating of field emission displays, or flat-panel displays, the microelectric industry faces a constant demand by the market to make such displays thinner and lighter and generally more compact compared to the previous generation of displays. Furthermore, there is considerable market pressure for manufacturers to generally make microelectronic devices, including field emission displays, for example, more quickly and less expensively in order for companies selling products incorporating such microelectronic devices to be, and remain, competitive in the marketplace.
U.S. Pat. Nos. 5,766,053 and 5,537,738 each issued to Cathey et al., assigned to the present assignee, and which are incorporated by reference herein, disclose an exemplary internal flat-panel field emission display and exemplary methods of attaching and electrically connecting inwardly facing planar substrates having matching patterns of bond pads, respectively. In both of these patents, selected elevated bond pads located on top of an insulative spacer, or ridge, which is provided along a selected edge of the lower-most substrate, are electrically connected by wire bonds to respectively associated circuit traces which were previously disposed upon the lower-most substrate so as to terminate short of the insulative spacer and be adjacent and located below the respectively connected elevated bond pads. In both patents, the respective electrical traces and the insulative spacer, or ridge, were formed by the screen printing of conductive and dielectric screen printable materials.
Exemplary prior known screen printing processes used in the formation of microelectronic components include the printing of conductive layers upon a selected substrate by forcing a paste, or printable substance, of a preselected viscosity through a stainless steel or, more often, a monofilament polymer screen of a preselected mesh having a preselected negative pattern formed through the screen by various known methods. The screen having a preselected pattern preformed therethrough is stretched so as to be tautly secured to a support frame such that the screen and the substrate can eventually be brought into very close proximity, preferably just short of actual direct contact with each other. Upon the screen being precisely positioned above the substrate in which the screen printable substance is to be disposed, the screen printable substance is typically introduced on top of the screen and a squeegee, or rubber blade, is biased toward the substrate and is swept across the flexible screen thereby pushing the printable substance forward along the screen as well as forcing a portion of the screen printable substance downward through the negative pattern provided on the screen and onto the underlying substrate. After the printable substance has been disposed on the receiving surface of the substrate and the screen and squeegee have been lifted away therefrom, the screen printed substance, or paste, is typically dried by firing at a selected temperature and duration. Thereafter, the substrate can be readied for further screen printing. For example, a dielectric layer may subsequently be screen printed on top of an underlying, previously screen printed conductive layer, or upon the last screen printed substance being fired, and the screen printed substrate may be forwarded on for further post-screen printing processing.
With respect to the fabrication and operation of field emission displays in particular, typically, a cathode plate having a plurality of individual cathodic electrodes is positioned in a parallel, spaced apart relationship with a transparent display substrate covered by a phosphorous film acting as an anode plate. Borosilicate glass is often selected as a transparent substrate due to it having a compatible coefficient of thermal expansion and suitable structural characteristics. The two plates are spaced away from each other by at least one dielectric spacer, ridge, or rail, which borders at least a portion, if not the entire periphery, of what is to be the display area or window. Upon providing electrical potentials of appropriate polarization and magnitude to various electrodes located on the cathode plate, electrons are emitted therefrom and are drawn toward the opposing, but spaced-apart, glass substrate serving as an anode plate whereon images can be viewed through the display window. In order for the opposing cathode plate and the transparent glass substrate/anode plate to function properly, the very small space between the two plates must be uniform and the various thickness of each of the various layers of screen printed material provided on each plate must be controlled within strict dimensional tolerances. Such strict dimensional tolerances are needed, not only for keeping the final FED unit as thin as possible, but are also needed for quality control purposes of the image to be displayed. For example, various qualities of the displayed image, such as overall image uniformity, resolution, and brightness, can be directly influenced by minute, or out of specification, spacing of the two opposing plates.
U.S. Pat. No. 5,612,256 issued to Stansbury, incorporated by reference herein, is directed toward multi-layer electrical interconnection structures and fabrication methods. More particularly, the '256 Stansbury patent discloses a flat-panel field emission display wherein a dielectric connector ridge having a generally planar top surface with generally curved side surfaces, is screen printed onto the rear surface of a faceplate of an FED device. The faceplate is also provided with a plurality of lower-level electrically conductive connectors by way of conventional screen printing that extend generally perpendicular to, and are spaced along one side but terminate short of, the dielectric connector ridge. Preferably, a plurality of discrete upper-level connectors ultimately positioned in registry with the lower-level connectors are screen printed atop the dielectric connector ridge in a subsequent screen printing process. In due course, each of the upper-level connectors, and the corresponding discrete lower-level connectors, are, respectively, electrically interconnected by a bond wire, for example, in accordance with a preferred embodiment disclosed therein.
Such a representative wire bonded connection in the context of a representative portion of an anode plate
16
of a field emission display is shown in drawing
FIGS. 1A through 1C
of the present drawings. More particularly in drawing
FIG. 1A
hereof, anode plate
16
has a transparent glass substrate
2
serving as an anode baseplate. Mounted upon substrate
2
is a first layer of a dielectric material
4
. Mounted on top of dielectric layer
4
is an optional second dielectric layer
6
Michiels John M.
Stansbury Darryl M.
Micro)n Technology, Inc.
TraskBritt
Yan Ren
LandOfFree
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