Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Patent
1995-09-22
1997-07-15
Thompson, Gregory D.
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
257719, 257726, 361715, 361770, 439 73, 439331, H05K 720
Patent
active
056488904
ABSTRACT:
A substrate, an alignment plate, a heat sink, a back plate, a plurality of spacers, and a plurality of nuts are used to removably package one or more semiconductor package into a single module. The semiconductor dies are packaged with tape automated bonding (TAB) packages having land grid array (LGA) outer lead bumps. The substrate comprises a number of land patterns, a number of alignment cavities, and a number of join cavities. The alignment plate is fabricated with a number of alignment pins, a number of housing cavities, and a number of join cavities. The heat sink is fabricated with a number of stems and a number of join cavities. The back plate is fabricated with a number of extrusions having threaded ends. The spacers are fabricated with flanged openings at both ends, and each spacer is loaded with a number of spring washers. The nuts are fabricated with stepped heads. The extrusions, the land patterns and the alignment and join cavities of the substrate, the alignment pins and the housing and join cavities of the alignment plate, the stems and the join cavities of the heat sink, the spring washer loaded spacers, and the stepped head nuts are coordinated in their numbers, sizes and geometric locations, as a result, the semiconductor packages may be easily replaced at a later time with enhanced versions, and the replaced semiconductor packages are salvageable. In some embodiments, a biasing member, such as a leaf spring, is provided in each housing cavity (aperture) of the alignment plate for biasing the semiconductor packages against one or more walls of each aperture.
REFERENCES:
patent: 4933808 (1990-06-01), Horton et al.
patent: 5014161 (1991-05-01), Lee et al.
patent: 5047830 (1991-09-01), Gradde
patent: 5175613 (1992-12-01), Barker, III et al.
patent: 5290193 (1994-03-01), Goff et al.
Conte Alfred S.
Loo Mike C.
Rainey Matthew
Sun Microsystems Inc.
Thompson Gregory D.
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