Updating hierarchical DAG representations through a bottom up me

Details Updating hierarchical DAG representations through a bottom up me Updating hierarchical DAG representations through a bottom up me

1995-09-18

1998-08-04

Teska, Kevin J.

Boots, shoes, and leggings

364488, H01L 2170, H01L 2350

Patent

active

057904162

ABSTRACT:
A process and implementing computer system (13) for updating circuit representations in a hierarchical Directed Acyclic Graph (DAG) format (400-410) based upon changes made to the primitive components of the circuit in a flat representation (201-213) includes performing a depth first search (505) on the hierarchical representation of the circuit beginning at the root level (501) for a given path. At each lower level, each child instance is visited (505) and if there is any change in any attribute between the hierarchical and flat representations (509), the component in the hierarchical representation which needs to be changed is copied (807) and connected to the children components of the original hierarchical representation. Changes in the attributes of the children components are made in the copied component (809). If the new component already exists in the hierarchy 811, then that component is deleted (817), otherwise the copied component is returned (813), and changes are passed upwardly to the root level (815) where the previous DAG may be replaced with the copied and updated DAG which includes changes in the attributes of components of a corresponding flat circuit representation.

REFERENCES:
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patent: 5497334 (1996-03-01), Russell et al.
Larry G. Jones, "Fast Batch and Incremental Netlist Compilation of Hierarchical Schematics", IEEE Transactions On Computer-Aided Design, vol. 10, No.7, Jul. 1991, pp. 922-931.
Larry G. Jones, "Efficient Evaluation of Circular Attribute Grammars", ACM Transactions on Programming Languages & Sys., vol. 12, No.3, Jul. 1990, pp. 429-462.
Larry G. Jones, "Fast Incremental Netlist Compilation of Hierarchical Schematics", 1989 IEEE, pp. 326-329.
Larry G. Jones, "Fast Onling/Offline Netlist Compilation of Hierarchical Schematics", 26th ACM/IEEE Design Automation Conference/1989, Paper 45.6, pp. 822-825.
Larry G. Jones, "Hierarchical VLSI Design Systems Based on Attribute Grammars", 1986--13th Annual ACM Symposium on Principles of Programming Languages, pp. 58-69.
Larry G. Jones, "Incremental Online Netlist Compilation of Hierarchical Schematics", Rpt. #UIUCDCS-R-89-1487, 1988 Nat'l. Science Foundation, pp. 1-11.
Larry G. Jones, Dissertation; "Increment VLSI Design Systems Based On Circular Attribute Grammars", 1986 Pennsylvania State University Microfilms Int'l., pp. 1-107.

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