Update synchronizer

Details Update synchronizer Update synchronizer

1991-09-23

1994-03-15

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 63, 328 72, 375106, 375107, 375119, H03L 700

Patent

active

052948420

ABSTRACT:
An update synchronizer includes a two-stage synchronization unit for generating enable signals to select an output signal from among multiple input clock signals of a clock delay multiplexer. The enable signals originate from an asynchronous control signal having a phase different from that of the clock signals. A pre-synchronization logic stage transforms the asynchronous control signal into complementary synchronous control signals for use by the clock synchronization units; these synchronous control signals, in turn, are transformed into complementary selection enable signals having phases within the domains of the input clock signals. This ensures that transitions of the enable signals occur during the same clock period.

REFERENCES:
patent: 4534044 (1985-08-01), Funke et al.
patent: 4584695 (1986-04-01), Wong et al.
patent: 4780889 (1988-10-01), Ley et al.
patent: 4973860 (1990-11-01), Ludwig
patent: 4977582 (1990-12-01), Nichols et al.

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