Update of control parameters of a direct memory access system wi

Details Update of control parameters of a direct memory access system wi Update of control parameters of a direct memory access system wi

1993-03-10

1995-07-04

Harvey, Jack B.

Boots, shoes, and leggings

395425, 364DIG1, G06F 1300, G06F 1328

Patent

active

054308534

ABSTRACT:
A DMA transfer control system includes a DMA control unit connected to a bus shared by a CPU; a storage device for receiving and storing various parameters of the DMA control unit via the CPU; an addressing unit for outputting an address of the various parameters to be set at the DMA control unit; and a circuit for outputting the various parameters from the storage device to the DMA control unit in synchronism with a reference clock of the CPU.

REFERENCES:
patent: 4479179 (1984-10-01), Dinwiddie, Jr.
patent: 4481578 (1984-11-01), Hughes et al.
patent: 4503496 (1985-03-01), Holzner et al.
patent: 4590468 (1986-05-01), Stieglitz
patent: 4651277 (1987-03-01), Sakaji
patent: 4807112 (1989-02-01), Hamasaki

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