Up/down counter for counting binary data stored in flip flops

Details Up/down counter for counting binary data stored in flip flops Up/down counter for counting binary data stored in flip flops

1991-06-05

1992-09-08

Miller, Stanley D.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Complementing a count

377 45, 377 26, H03K 2366

Patent

active

051464799

ABSTRACT:
An updown counter up-counts binary data stored in respective flip-flops in an up-count mode, and down-counts the binary data stored in the respective flip-flops in a down-count mode. When a command for an up-count mode is applied by an up/down control signal, the binary data stored in the respective flip-flops is converted into a complement on two after converting it into a complement on one. When a command for a down-count mode is applied by an up/down control signal, the binary data stored in the respective flip-flops is converted into a complement on one after converting it into a complement on two. The converted data is used to rewrite the data stored in the respective flip-flops.

REFERENCES:
patent: 2848166 (1958-08-01), Wagner
patent: 3906195 (1975-09-01), Maejima
patent: 4700370 (1987-10-01), Banerjee et al.
patent: 4713832 (1987-12-01), Hutson
AT&T Bell Laboratories "Principles of CMOS VLSI Design" (1985), p. 338.

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