Unsigned integer multiply/divide circuit

Details Unsigned integer multiply/divide circuit Unsigned integer multiply/divide circuit

1991-09-19

1993-05-04

Malzahn, David H.

Boots, shoes, and leggings

G06F 752

Patent

active

052087697

ABSTRACT:
An unsigned integer multiply/divide circuit is implemented with an unconventional non-restoring division algorithm which always subtracts the divisor from the partial dividend regardless of whether the divisor is greater than the partial dividend or not, a hybrid carry lookahead and carry select adder construction where both portions run in parallel, and control lookahead features which avoid interim calculation wait delays. The division algorithm is further modified in order that the same hardware configuration primarily consisting of storage registers, an adder, a multiplexer, and a shifter can be used for both multiplication and division operations.

REFERENCES:
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patent: 4761760 (1988-08-01), Tomoji
patent: 4878191 (1989-10-01), Oguchi
patent: 5014233 (1991-05-01), Kihava et al.
patent: 5027309 (1991-06-01), Koumoto et al.

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