Universal timing controller for video tape recorder servo system

Details Universal timing controller for video tape recorder servo system Universal timing controller for video tape recorder servo system

1992-11-09

1994-12-06

Lall, Parshotam S.

Dynamic magnetic information storage or retrieval

Head

Core

360 7306, 360 7307, 360 7807, 360 7809, 3642382, 364270, 3649291, 3649343, 364DIG2, 364238, 395500, G06F 1300, G11B 2710, H04L 1252

Patent

active

053718810

ABSTRACT:
A microcomputer constructed on a single semiconductor substrate comprises a microprocessor CPU, a read only memory ROM, a random access memory RAM, a common bus BUS for electrically connecting the microprocessor CPU, the read only memory ROM and the random access memory RAM, a plurality of timers TM, a plurality of input/output circuits I/O, a network portion NET for bringing the timers TM and the input/output circuits I/O into a desired connectional form, and a control register CRG for controlling the network portion NET.
The control register CRG is coupled to the common bus BUS, and can have control bit information written thereinto by the microprocessor CPU. On the basis of the control bit information stored in the control register CRG, the network portion NET connects the timers TM and/or the input/output circuits I/O so as to achieve a specified circuit arrangement instructed by the control bit information.

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patent: 5274515 (1993-12-01), Furuyama

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