Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Patent
1994-08-26
1996-06-04
Karlsen, Ernest F.
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
439493, 439912, G01R 3102
Patent
active
055236952
ABSTRACT:
An apparatus and method for placing the die of a die-down configured integrated circuit package in an upright orientation. The first board has electrical receptors peripherally surrounding a first hole formed through the first board. A die-down configured integrated circuit package with the die thereof exposed is inserted into a test socket having a second hole formed through the bottom thereof. The exposed die is located over the second hole in the bottom surface of the test socket. The test socket is placed onto the top surface of the first board. The test socket is positioned on the first board such that the pins of the test socket engage the electrical receptors and such that the exposed die of the die-down configured integrated circuit package is disposed over the first hole. The first board is coupled to a second board having electrical connectors extending from the bottom surface thereof. Each of the electrical connector pins is electrically coupled to a respective electrical receptor on the first board. A flexible connector couples the first and second board together. In one embodiment, the flexible connector also provides electrical coupling of the two boards. Next, the first board is "flipped" or folded over to a position above the second board such that the top surface of the first board opposes the top surface of the second board, and such that the exposed die is visible through the first hole in the first board and the second hole in the test socket. The electrical connecting pins of the second board are then inserted into a standard swap block. In so doing, the present invention provides a socket structure for die-down configured packages which renders the die accessible and which is suitable for use in standard swap block.
REFERENCES:
patent: 4420794 (1983-12-01), Anderson
patent: 4508403 (1985-04-01), Weltman et al.
patent: 4560216 (1985-12-01), Egawa
patent: 4924179 (1990-05-01), Sherman
patent: 5006792 (1991-04-01), Malhi et al.
Karlsen Ernest F.
King Patrick T.
Kobert Russell M.
VLSI Technology Inc.
LandOfFree
Universal test socket for exposing the active surface of an inte does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Universal test socket for exposing the active surface of an inte, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Universal test socket for exposing the active surface of an inte will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-386508