Universal condition latch in an electronic digital calculator

Details Universal condition latch in an electronic digital calculator Universal condition latch in an electronic digital calculator

1974-11-26

1976-02-17

Morrison, Malcolm A.

Registers

Transfer mechanism

Traveling pawl

3401725, G06F 1502

Patent

active

039393356

ABSTRACT:
A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology, is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator is a universal condition latch which is so connected as to permit the state thereof to be determined by multiple sources while reducing the number of ROM instructions required and hence the size of the ROM to permit fabrication on the smaller chip. The condition latch state is determined, for example, by the logical OR of up to four flags after a test flag instruction, by the logical OR of up to four keyboard inputs after a test key instruction, by the carry output of the adder after any add instruction, or by the results of an adder compare after any compare instruction.

REFERENCES:
patent: 3364471 (1968-01-01), Bienhoff et al.
patent: 3509329 (1970-04-01), Wang et al.
patent: 3760171 (1973-09-01), Wang et al.
patent: 3760370 (1973-09-01), Cochran

Affiliated with

Also associated with

Rating

Universal condition latch in an electronic digital calculator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Universal condition latch in an electronic digital calculator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Universal condition latch in an electronic digital calculator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1747509