Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-03-08
2009-06-23
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240
Reexamination Certificate
active
07551491
ABSTRACT:
Unit cells of a non-volatile memory device and a method thereof are provided. In an example, the unit cell may include a first memory transistor and a second memory transistor connected to each other in series and further connected in common to a word line, the first and second memory transistors including first and second storage nodes, respectively, the first and second storage nodes configured to execute concurrent memory operations. In another example, the unit cell may include a semiconductor substrate in which first and second bit line regions are defined, first and second storage node layers respectively formed on the semiconductor substrate between the first and second bit line regions, a first pass gate electrode formed on the semiconductor substrate between the first bit line region and the first storage node layer, a second pass gate electrode formed on the semiconductor substrate between the second bit line region and the second storage node layer, a third pass gate electrode formed on the semiconductor substrate between the first and second storage node layers, a third bit line region formed in a portion of the semiconductor substrate under the third pass gate electrode and a control gate electrode extending across the first and second storage node layers. The example unit cells may be implemented within a non-volatile memory device (e.g., a flash memory device), such that the non-volatile memory device may include a plurality of example unit cells.
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Hyun Jae-woong
Kim Suk-pil
Kim Won-joo
Koo June-mo
Park Yoon-dong
Harness & Dickey & Pierce P.L.C.
Samsung Electroncs Co., Ltd
Tran Michael T
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