Unified memory address generation system and method for...

Details Unified memory address generation system and method for... Unified memory address generation system and method for...

2006-10-03

2006-10-03

Lee, Young (Department: 2621)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

Reexamination Certificate

active

07116718

ABSTRACT:
A method and apparatus is provided for generating various binary addresses for use in decoding MPEG video data. One or more n-bit counters and mutiplexers are used to generate such binary addresses. Different binary addresses can be generated by the same n-bit counter by swapping the bits of the n-bit counter. The number of different binary addresses that an n-bit counter can generate is n factorial.

REFERENCES:
patent: 5842123 (1998-11-01), Hamamoto et al.
patent: 5940874 (1999-08-01), Fulcomer
patent: 6111615 (2000-08-01), Oh et al.
patent: 6442085 (2002-08-01), Fragano et al.
patent: 6647518 (2003-11-01), Asmanis
patent: 2003/0014616 (2003-01-01), Makphaibulchoke et al.
patent: 2003/0174549 (2003-09-01), Yaguchi et al.

Affiliated with

Also associated with

Rating

Unified memory address generation system and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Unified memory address generation system and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Unified memory address generation system and method for... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3666969