Unified floating point and integer datapath for a RISC processor

Details Unified floating point and integer datapath for a RISC processor Unified floating point and integer datapath for a RISC processor

1993-05-17

1995-09-12

Bowler, Alyssa H.

Boots, shoes, and leggings

395375, 364DIG2, 36493155, 3649374, 3649371, 3649373, G06F 1500

Patent

active

054506077

ABSTRACT:
A 64-bit wide unified integer and floating-point datapath for a RISC processor. The unified datapath allows for the sharing of some of the major hardware resources within the integer and floating-point execution units, as well as simplifying a large portion of the peripheral circuitry. The unified datapath results in a more efficient use of the hardware with reduced average power dissipation and area, without compromising the major performance advantages of RISC processors.

REFERENCES:
Fuller; "MIPS tips RISC plans from low to high end; Chip vendor outlines 4200 and a peek at T5"; May 1993.
Finney et al; "Using a Common Barrel Shifter for Operand Normalization, Operand Alignment and Operand Unpack and Pack in Floating Point".
Gillian et al. "Design and Architecture for a multi-mode pipelined, floating-point adder", May 1991; IEEE.
Enriquez et al. "Design of a multi-mode pipelined multiplier for Floating Point application"; May 1991; IEEE.
Taylor et al. "A 100 MHz Floating Point/Integer Processor" IEEE May 1990.

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