Unified apparatus and method to assure probe card-to-wafer...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S1540PB, C361S143000

Reexamination Certificate

active

06794889

ABSTRACT:

FIELD OF THE INVENTION
The invention is directed towards the field of semiconductor automatic test equipment, and more specifically, towards probe card-to-wafer parallelism (also described as planarity) in semiconductor automatic test equipment at wafer probe.
BACKGROUND OF THE INVENTION
Automatic Test Equipment Configuration
Within the semiconductor industry, an essential step in the manufacturing process is wafer test, also known as wafer probe or wafer sort. During wafer sort, each individual die on the wafer is electrically tested for functionality before packaging.
FIG. 1A
is a high-level sketch showing a sample configuration of the automated test equipment (ATE), also known as an ATE test cell or test cell, used in wafer sort. This configuration shall hereinafter be referred to as a direct-docking system. The equipment that controls and runs the tests on the wafer is called a tester
101
. The tester
101
has a moveable test head
103
that is positioned over a wafer
105
during test. A prober
107
loads and unloads each wafer
105
onto a prober stage
109
. The prober stage
109
(also known as a prober chuck) maneuvers each wafer
105
into position for testing, and is capable of movement in x-, y-, and z-directions. An arrow
121
points in the direction of the z-axis for the system. The x- and y-axis are in the plane of the wafer
105
. In this ATE test cell configuration, the test head
103
rests on docking supports
111
, which are adjustable in height. In other test cell configurations, the test head
103
may be suspended above the prober
107
using appropriate means other than docking supports.
The test head
103
makes contact with the wafer
105
via probe card
113
, which can be attached to the tester interface
120
with a number of possible mechanisms, including but not limited to vacuum attachment, mechanical latching, or retention using electromechanical connectors. In some alternate test cell configurations, such as the one shown in
FIG. 1B
, the probe card
113
is mounted directly onto a prober head plate
114
of the prober
107
. The configuration of
FIG. 1B
shall hereinafter be referred to as a conventional docking system. The probe card
113
holds an array of probes
115
that have been manufactured to line up with contact pads on the wafer
105
. Ideally, all of the probes
115
are aligned in the same plane, parallel to the wafer surface, such that contact is made with all of the contact pads on the wafer
105
simultaneously, minimizing the required z-direction travel of the prober stage
109
. The probe depth
116
is defined to be the distance in the z-direction from the tester interface
120
to the tip of the probes
115
as illustrated in FIG.
1
A. Each probe card
113
is custom-made for the specific circuitry of the wafer
105
that is to be tested, and has an interface that is electrically and mechanically matched to the tester specific interface on the test head
103
. The prober
107
typically has a prober vision system with an upward looking camera
117
that can optically measure distances in the z-direction.
A fixed point, usually the center of x-y travel of the prober stage
109
, is designated as the probing center of the ATE. The test cell has a system reference plane
119
, which is typically a flat surface on a mechanical portion of the test cell. The system reference plane
119
is the surface against which the planes of other surfaces in the test cell are measured relative to. In the direct docking system of
FIG. 1A
, the system reference plane
119
is also the tester interface
120
. In other test cell configurations, such as a conventional docking system, the system reference plane
119
may be another surface such as the prober head plate
114
or other flat surface. Each probe card
113
, depending upon the probe technology employed and other application-specific factors, has a manufacturing planarity tolerance, which specifies the maximum distance that can be tolerated between the lowest and highest hanging probe
115
on the probe card
113
before the wafer
105
can no longer be accurately tested. The components that make up a test cell, consisting of tester
101
, prober
107
, and probe card
113
, are typically supplied and supported by different vendors. For example, it is very common for the tester
101
to be supplied by one vendor, the prober
107
supplied by another, and the probe card
113
supplied by a third vendor.
Probe Card Planarization
Before wafer sort, it is imperative that the probe card
113
is leveled so that the tips of the probes
115
lie in a single plane, parallel to the wafer surface. This process, known as probe card planarization, ensures that the probes
115
all simultaneously contact the corresponding pads on the wafer
105
.
FIG. 2
shows an ATE test cell (a direct docking system) in which the test head
103
and probe card
113
are slightly tilted (exaggerated for clarity in the figure) and therefore not parallel to the wafer
105
. As the test head
103
is brought down to rest upon the docking supports
111
, the first probe
115
A contacts the wafer
105
before any of the other probes
115
. The test head
103
cannot be positioned any lower without damaging the first probe
115
A and/or the wafer circuitry, but the remaining probes
115
have yet to make contact with the wafer
105
. The test head
103
and probe card
113
must be leveled and made substantially parallel to the wafer
105
(within the tolerance of each ATE test cell) by adjusting the height of the docking supports
111
, before the wafer
105
can be successfully tested. Probe cards
113
in conventional docking systems also require planarization before running wafer sort. In conventional docking systems, the probe card
113
is planarized by making adjustments to the prober head plate
114
.
There are various ways to planarize a probe card
113
. One method, used in direct docking systems, requires using a custom-made leveling apparatus. The leveling apparatus is mounted onto the docking supports
111
of the prober
107
, and has three holes in its body that are positioned above the prober stage
109
. A mechanical depth gauge is inserted into each hole to measure the distance between the leveling apparatus (which is a planar reference surface) and the prober stage
109
. The height of each docking support
111
is adjusted until the measured distances are equal, indicating the docking supports
111
themselves are planar. If the docking supports
111
are planar, then it is presumed the test head
103
and its probe card
113
will also be planar when the test head
103
is set down upon the docking supports
111
.
Unfortunately, the described leveling apparatus is flawed because it does not replicate the physical setup of the ATE test cell during wafer sort. Once the leveling apparatus is removed and the test head
103
is lowered onto the docking supports
111
, the weight of the test head
103
(which can exceed 1000 pounds in some systems) alters the height of the docking supports
111
so that the test head
103
is no longer planarized. Furthermore, the leveling apparatus cannot utilize the measurement capabilities of the upward looking camera
117
, nor can it be used in conventional docking systems
Another probe card planarization method is described in U.S. Pat. No. 5,861,759 to Bialobrodski et al. U.S. Pat. No. 5,861,759 uses the prober's upward looking camera to gauge the distance between 3 selected probes on the probe card. The test head rests on one fixed support and 2 adjustable, motorized supports. The camera communicates to a central microprocessor any adjustments that need to be made to the tilt of the test head in order to planarize the probe points to the wafer surface. In response, the central microprocessor adjusts the height of the motorized supports accordingly. Unfortunately, this method and apparatus requires additional setup steps and a costly motion control system to control the motorized supports.
Planarity Verification Methods
To ensure probe card planari

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