Undershoot reduction circuit

Details Undershoot reduction circuit Undershoot reduction circuit

1990-10-29

1991-10-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307263, 307542, H03K 1716, H03K 512

Patent

active

050557149

ABSTRACT:
A circuit for reducing negative ground bounce on the ground reference of a CMOS circuit having an input terminal and an output terminal includes an output buffer having an input coupled to the input terminal of the circuit and an output coupled to the output terminal of the circuit. A NOR gate has first and second inputs respectively which are coupled to the input and output terminals of the circuit. An injector circuit is coupled to an output of the NOR gate and to the input terminal of the circuit for providing a predetermined current to the output terminal of the circuit.

REFERENCES:
patent: 4498021 (1985-02-01), Uya
patent: 4890015 (1989-12-01), Wise
patent: 4959561 (1990-09-01), McDermott et al.
patent: 4970419 (1990-11-01), Hagen et al.
"Fact QS Output Control", National Semiconductor, Mar. 1990.

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