Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Patent
1997-01-31
1999-03-09
Everhart, Caridad
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
438458, 438459, 438975, 438977, 438 7, H01L 21461
Patent
active
058800107
ABSTRACT:
An integrated circuit and associated method for reducing total signal propagation delay as well as power consumption and thermal dissipation. The integrated circuit comprises a plurality of active layers coupled together in close proximity. In order to produce the integrated circuit, at least two active layers are removed from their respective substrate after integrated circuit processing. Some of the methods that may be used include Silicon on Insulator ("SOI") and epitaxial etch stop ("EES") processes. After removal of the active layers, at least one via is implemented on a bottom surface of each active layer in order to establish a mechanical and electrical connection between the via and its associated metal interconnects. Thereafter, the active layers are coupled together by ultrasonic welding or through nitride lamination using Titanium Nitride for conductive regions and Silicon Nitride for insulative regions.
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Everhart Caridad
Sun Microsystems Inc.
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