Ultrasound diagnostic equipment

Details Ultrasound diagnostic equipment Ultrasound diagnostic equipment

1985-07-26

1987-09-22

Birmiel, Howard A.

Measuring and testing

Instrument proving or calibrating

Volume of flow, speed of flow, volume rate of flow, or mass...

367 13, 128660, G01N 2900

Patent

active

046946802

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

This inventions relates to an ultrasound diagnostic equipment with an internal signal checking means.


BACKGROUND ART

In an ultrasound diagnostic equipment, it is required to check whether or not each section thereof operates normally through use of internal signal measurement.
Namely, it is required to check power circuit operation of the DC power supply voltage and ripple measurements, and also to check time gain control (TGC) and receive filter time frequency control (TFC) operations through TGC signal and TFC signal measurements, respectively.
So far, the measurement of internal signals in the conventional ultrasound diagnostic device has been performed using various conventional measuring instruments for signal measurements.
Therefore, it was required for the operator to acquire capability for handling various measuring instruments and for evaluating the measured results.


DISCLOSURE OF THE INVENTION

This invention aims to overcome such disadvantages aforementioned and to provide an ultrasound diagnostic equipment furnished with an internal signal checking circuit configured in a combined use with signal processing and display means in the ultrasound diagnostic equipment.
For the accomplishment of this purpose, in this invention there is provided a video memory means to store receive echo signals wherein internal testing signals are also stored by selectively inputting internal testing signals into the video memory means through a multiplexer to check internal testing signals stored therein by displaying them on a image display means of the ultrasound diagnostic equipment as an image or by evaluating them using a processor.


BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a block diagram showing the configuration of the embodiment of this invention; and
FIG. 2 shows a time chart of explaining the operation of the equipment in FIG. 1.


BEST MODE FOR CARRYING OUT THE INVENTION

Referring to FIG. 1, an illustrative embodiment of this invention consists of an ultrasound probe 1, transmitter receiver 2, multiplexer 3, analog-to-digital converter (hereinafter called A/D converter) 4, video memory 5, display 6, processor (hereinafter called CPU) 7, clock generator (hereinafter called clock circuit) 8 and internal signal detector 9.
The transmitter receiver 2 is provided with a transmit circuit and a receive circuit; the display 6 is provided with a digital-to-analog conversion circuit (hereinafter called D/A converter) 61 and image display tube (hereinafter called CRT) 62; and the internal signal detector 9 is provided with signal conditioners comprising one or more resistance divider(s) 91, amplifier(s) 92 and delay circuit(s) 93. The type and the number of signal conditioners correspond to type and number of internal signals.
The output of the transmit circuit in the transmitter receiver 2 to connect to the ultrasound probe 1; the output of the ultrasound probe 1 to connect to the input of the receive circuit in the transmitter receiver 2; and the output of the receive circuit in the transmitter receiver 2 to connect to the first data input of the multiplexer 3.
On the other hand, the inputs internal signal detector 9 to connect to the measured points within the ultrasound diagnostic equipment.
The outputs of the internal signal detector 9 are connected to the respective data inputs of the multiplexer 3.
The data output of the multiplexer 3 to connect to the input of the A/D converter 4; the output of the A/D converter 4 to connect to the data input of the video memory 5; the first data output of the video memory 5 to connect to the input of the D/A converter 61 in the display 6; and the output of the D/A converter 61 to connect to the input of the CRT 62. Further, the second data output of the video memory 5 to connect to the input of the CPU 7.
The first output of the clock circuit 8 to connect to the clock signal input of the transmitter receiver 2; the second output of the clock circuit 8 to connect to the clock signal input of the A/D converter 4; and the third output of the clo

REFERENCES:
patent: 4043175 (1977-08-01), Fredriksson et al.
patent: 4233677 (1980-11-01), Brown et al.
patent: 4366561 (1982-12-01), Klein
patent: 4445206 (1984-04-01), Avdenard
patent: 4545251 (1985-10-01), Uchida et al.
patent: 4594692 (1986-06-01), Read

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