Ultra-small semiconductor devices having patterned edge planar s

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

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257 12, 257 14, 257 24, 257 37, 257623, H01L 2906

Patent

active

056591799

ABSTRACT:
Ultra-small semiconductor devices and a method of fabrication including patterning the planar surface of a substrate to form a pattern edge (e.g. a mesa) and consecutively forming a plurality of layers of semiconductor material in overlying relationship to the pattern edge so that a discontinuity is produced in the layers and a first layer on one side of the pattern edge is aligned with and in electrical contact with a different layer on the other side of the pattern edge.

REFERENCES:
patent: 4939556 (1990-07-01), Eguchi et al.
patent: 5428224 (1995-06-01), Hayashi et al.

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