Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2000-07-26
2001-06-19
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S540000, C323S312000, C323S313000
Reexamination Certificate
active
06249176
ABSTRACT:
BACKGROUND
1. Field of The Invention
The present invention relates to current sources and, more specifically, to cascode current sources operable at low and variable voltages.
2. Description of The Related Art
Current sources are widely used in analog circuits. As DC biasing elements, current sources are used extensively to establish the DC bias levels within a circuit while providing low sensitivity to power supply and temperature variations of the overall circuit. Current sources are also widely used as load devices in amplifier stages. The high incremental impedance of the current mirror provides a high voltage gain of amplifier stages at low power supply voltages.
FIG. 1
illustrates a current source
20
which includes three identical PMOS transistors
22
,
24
, and
26
that provide currents in respective branches
21
,
23
and
25
. Output node N
40
of branch
21
is connected to the gate and the drain terminals of NMOS transistor
10
. The source terminal of NMOS transistor
10
is connected to ground. Output node N
42
of branch
13
is connected to the emitter terminal of PNP transistor
11
. The collector and the base terminals of transistor
11
are connected to ground. Output node N
44
of branch
25
is connected to one end of resistor
12
. A second end of resistor
12
is connected to ground.
Because the gate and the source terminals of transistors
22
,
24
and
26
are connected to respective nodes N
46
and N
45
, transistors
22
,
24
and
26
have substantially identical gate-to-source voltages. Consequently, the major source of mismatch between the magnitudes of currents I
27
, I
28
, or I
29
is caused by differences between the values of the voltage signals at output nodes N
40
, N
42
, and N
44
. Differences between currents at output nodes N
40
, N
42
and N
44
is also caused in part by noise or mismatches in the sizes of PMOS transistors
22
,
24
, or
26
. The differences in current also cause voltage differences at nodes N
40
, N
42
, and N
44
.
To lessen the dependence of the magnitudes of currents I
27
, I
28
, and I
29
on the values of voltages at respective output nodes N
40
, N
42
, and N
44
and thus to achieve a good matching between the magnitudes of currents I
27
-I
29
, it is desirable that the small signal output impedance of output nodes N
40
, N
42
, and N
44
be high. A conventional technique for increasing the output impedance of a current source is to use a cascode configuration.
FIG. 2
illustrates a three-branch cascode current source
60
that is similar to current source
20
of
FIG. 1
, except that current source
60
uses cascode transistors
13
,
14
, and
15
in branches
21
,
23
, and
25
, respectively. An input biasing circuit
40
establishes a voltage at node N
50
less than the voltage at node N
45
. Transistors
13
,
14
, and
15
increase the impedances at output nodes N
40
, N
42
, and N
44
, respectively. Thus, current source
60
provides a much improved matching among the magnitudes of currents I
27
, I
28
, and I
29
compared to current source
20
, shown in FIG.
1
.
The cascode configuration of current source
60
achieves a good current matching when the voltage across voltage supply V
1
and ground, exceeds a minimum threshold. However, the trend is that the available voltage at V
1
has decreased due system designs. When the voltage at V
1
falls below a minimum threshold limit, e.g. 2.0 volts, and the voltage between nodes N
50
and N
45
is less than V
1
, e.g. 1.5 volts, a voltage across the drain-to-source terminals of cascode transistors
13
,
14
, and
15
becomes negligible, thereby rendering current mirror
60
inoperable at low supply voltages. Thus, for acceptable operation of current source
60
, more supply voltage is required than is available.
Therefore, what is needed is a current source with a high output impedance that is also capable of operating from low supply voltages.
SUMMARY OF THE INVENTION
A first embodiment provides a current source for providing matched currents at low and variable bias voltages including 1) a first circuit for providing a reference current; 2) a first transistor including a control terminal, first terminal, and second terminal, the control terminal is coupled to the first circuit; 3) a second transistor including a control terminal, first terminal, and second terminal, with a first current density, the second terminal is coupled to receive the first current; 4) a third transistor including a control terminal, first terminal, and second terminal, the control terminal is coupled to the control terminal of the first transistor and the second terminal provides a second current; 5) a fourth transistor including a control terminal, first terminal, and second terminal, with a second current density, the first terminal is coupled to receive the second current and the second terminal provides a third current to a load; 6) a fifth transistor including a control terminal, first terminal, and second terminal, the control terminal is coupled to the control terminal of the third transistor and the second terminal provides a fourth current; and 7) a bias circuit coupled to the control terminal of the fourth transistor and the second terminal of the fifth transistor for providing a voltage at the second terminal of the fifth transistor and a voltage at the control terminal of the fourth transistor so that a voltage at the first terminal of the fourth transistor and a voltage at the second terminal of the second transistor match.
The bias circuit of the current source of the first embodiment can include: a sixth transistor including a control terminal, first terminal, and second terminal, with a third current density, the control terminal is coupled to the control terminal of the fourth transistor, the second terminal is coupled to the control terminal, and the first terminal is coupled to the second terminal of the fifth transistor; a seventh transistor including a control terminal, first terminal, and second terminal, with a fourth current density, the second terminal is coupled to the control terminal of the sixth transistor and the control terminal is coupled to the second terminal of the fifth transistor; the third current density matches the second current density and the fourth current density matches the first current density.
In an embodiment, an aspect ratio of the sixth transistor is approximately 400 to 1; an aspect ratio of the seventh transistor is 20 to 5; and an aspect ratio of the fourth transistor is 400 to 1.
In an embodiment, an aspect ratio of the fourth transistor is larger than an aspect ratio of the sixth transistor.
A second embodiment provides a current source for providing matched currents at low or variable bias voltages including: a first circuit including a first transistor that includes a control terminal, a first terminal, and second terminal, that provides a first current; a second circuit including a second transistor that includes a control terminal, a first terminal, and second terminal, that is coupled to the first circuit and that provides an output current to an output node; and a biasing circuit including a third transistor that includes a control terminal, a first terminal, and second terminal and a fourth transistor that includes a control terminal, a first terminal, and second terminal, coupled to the second circuit. The biasing circuit provides a voltage at the first terminal of the third transistor and a voltage at the control terminal of the second transistor so that a voltage at the first terminal of the second transistor and a voltage at the second terminal of the first transistor match.
In an embodiment, a current density of the first transistor and the fourth transistor are approximately the same and a current density of the second transistor and the third transistor are approximately the same.
In an embodiment, an aspect ratio of the second transistor is approximately the same as an aspect ratio of the third transistor.
In an embodiment, an aspect ratio of the second transistor is larger than an aspect ratio of the
Callahan Timothy P.
Kwok, Esq. Edward C.
Luu An T.
National Semiconductor Corporation
Skjerven Morrill & MacPherson
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