Ultra low noise high linearity LNA for multi-mode transceiver

Details Ultra low noise high linearity LNA for multi-mode transceiver Ultra low noise high linearity LNA for multi-mode transceiver

2011-03-22

2011-03-22

Pascal, Robert (Department: 2817)

Amplifiers

Combined with automatic amplifier disabling switch means

C330S12400D

Reexamination Certificate

active

07911269

ABSTRACT:
An amplifier for operating at low, middle or high linearity modes, the amplifier comprising a first low noise amplifier (LNA) coupled to a second low noise amplifier for providing amplification; a first degeneration inductor coupled to the first LNA for providing impedance matching; a −g3generation block coupled to an output of the second LNA for canceling third-order transconductance distortion; and a first enabling/disabling component coupled to the output of the second LNA and aligned in parallel with the −g3generation block for operating at least one of the first and second LNAs at one of the low, middle or high linearity modes.

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Vladimir Aparin and Lawrence E. Larson, Fellow, Modified Derivative Superposition Method for Linearizing FET Low-Noise Amplifiers, IEEE, pp. 571-580, Feb. 2005.
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Kumar S. et al: “Enhancement mode PHEMT low noise amplifier with LNA linearity control (IP3) and mitigated bypass switch” Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE, [Online] Jun. 2, 2002, pp. 213-216, XP007909719 Retrieved from the Internet: URL:http://ieeexplore.ieee.org> [retrieved on Sep. 7, 2009] p. 213, left-hand column, line 20 - p. 215, left-hand column, line 4; figures Ka), kb).
Mujeeb A. et al: “Highly Linear CMOS low noise amplifier with IIP3 boosting technique” SOC Design Conference, 2008. ISOCC ″08. International, IEEE, Piscataway, NJ, USA, Nov. 24, 2008, pp. 1-414, XP031449530 ISBN: 978-1-4244-2598-3 p. 414, right-hand column, line 4 - p. 416, right-hand column, line 8, figures 1,2.

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