Ultra low inductance multi layer ceramic capacitor

Details Ultra low inductance multi layer ceramic capacitor Ultra low inductance multi layer ceramic capacitor

2005-09-27

2005-09-27

Thomas, Eric W. (Department: 2831)

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

C361S311000, C361S309000

Reexamination Certificate

active

06950300

ABSTRACT:
A multilayer capacitor having a low parasitic inductance includes a first electrode, a second electrode, a dielectric, a first contact, and a second contact. The first electrode is substantially rectangular and it includes a first contact finger. The dielectric has a first surface and a second surface, wherein the first and second surfaces are situated opposite with each other. The first surface of the dielectric is coupled with the first electrode. The second electrode is substantially rectangular and it includes a first contact finger. The second electrode is coupled to the second surface of the dielectric. The first contact is coupled to the first contact finger of the first electrode. The second contact is coupled to the first contact finger of the second electrode. The second contact is situated at a minimal space from the first contact to reduce the parasitic inductance.

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Copy of the European Search Report for European Application No. EP04010108, 2 pages.
“TDK Multilayer Ceramic Chip Capacitors”, Application Manual, pp. 42, no date.

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