Ultra linear high speed operational amplifier output stage

Details Ultra linear high speed operational amplifier output stage Ultra linear high speed operational amplifier output stage

2001-12-03

2004-09-21

Tokar, Michael (Department: 2819)

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

C330S267000, C330S268000

Reexamination Certificate

active

06794943

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention generally relates to electronic systems and in particular to operational amplifier output stages.
BACKGROUND OF THE INVENTION
Operational amplifiers are used in many electronic circuits to condition, manipulate and amplify signals. The operating characteristics of a particular operational amplifier are dependent upon its circuit topology. Generally, the operational amplifier consists of a number of stages, each containing internal sub-stages.
Crossover distortion is an important parameter op-amp performance and is largely correlated to bias current. It occurs, for example, when a signal being processed in a class AB amplifier transitions from the positive portion of a cycle to the negative portion of a cycle, and the reverse. This distortion is primarily generated in output transistors. To minimize crossover distortion, transistors within operational amplifier output stage circuits are sometimes biased slightly above cut-off. The class AB biasing arrangement consumes more power than if the transistors are biased in a class B configuration, but result in less cross-over distortion. The class AB biasing arrangement has more cross-over distortion than a class A biasing arrangement, but uses less current for proper operation.
SUMMARY OF THE INVENTION
The present invention achieves technical advantages as an ultra linear high speed operational amplifier output stage using a localized feedback system in which current gains are close to &bgr;
n
*&bgr;
p
, where &bgr;
n
refers to the beta of either the pre-driver npn transistor, output driver npn transistor or an average of both, depending on the current signal and &bgr;
p
refers to the beta of either the pre-driver pnp transistor, output pnp transistor or an average of both. Where signal current is large and positive, load conduction is through the output npn transistor and pre-driver pnp transistor. Where signal current is large and negative, load conduction is through the pre-driver npn transistor and output pnp transistor. Where the signal is small, load conduction varies in tandem through the output npn transistor and pre-driver pnp transistor and the output pnp transistor and pre-driver npn transistor.
The output stage can be seen to comprise a pre-driver sub-stage and final sub-stage. The pre-driver sub-stage is further comprised of a first and a second pre-driver sub-stage circuit. In addition, the final sub-stage is further comprised of a first and a second final sub-stage circuit. The input to the present invention comprises a transconductance (“g
m
”) cell which, when a voltage is applied thereto, an error voltage appears across the input gm cell and an error current is produced at the output of the input g
m
cell. The error current (&dgr;I
in
) flows into the emitters of two pre-driver sub-stage transistors and flows out of their collectors into the bases of two other pre-driver transistors. Through this translinear loop, no net signal is lost. The gained up error currents then flow into the final sub-stage translinear loop, specifically, into the bases of two final sub-stage transistors. Effectively, in the small signal context, the first pre-driver sub-stage circuit amplifies a positive portion of the current signal for output to the first final sub-stage circuit while the second pre-driver sub-stage circuit amplifies a negative portion of the current signal for output to the second final sub-stage circuit. The first and second final sub-stages further amplify the positive portion and negative portion, respectively, of the current signal.
The first and second final sub-stage circuits are interconnected at an output terminal of the operational amplifier output stage such that the amplified positive portion of the signal and amplified negative portion of the signal are joined substantially in phase with improved crossover distortion characteristics.


REFERENCES:
patent: 5789982 (1998-08-01), Uscategui et al.
patent: 5825228 (1998-10-01), Gross
patent: 5907262 (1999-05-01), Graeme et al.
patent: 6433637 (2002-08-01), Sauer
patent: 6566949 (2003-05-01), Park

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