Ultra-high linearity RF passive mixer

Details Ultra-high linearity RF passive mixer Ultra-high linearity RF passive mixer

2005-01-25

2005-01-25

Nguyen, Tony T. (Department: 2685)

Telecommunications

Receiver or analog modulated signal frequency converter

Signal selection based on frequency

C455S209000, C455S278100, C327S206000, C327S210000

Reexamination Certificate

active

06847808

ABSTRACT:
A CMOS implemented passive mixer circuit for improving linearity performance in wireless communication systems is described, including dual pairs of NMOS FETs and dual pairs of PMOS FETs. Each NMOS FET is connected in parallel with a corresponding PMOS FET. A local oscillator signal is provided to the gate of one FET while a 180-degree phase shifted local oscillator signal is provided to the gate of its complementary FET. Because the complementary FETs are driven by local oscillator signals that are 180 degrees out of phase, the NMOS FET is turned on for at least a portion of the positive cycle of the local oscillator signal and the PMOS FET is turned on for at least a portion of the negative cycle of the 180-degree phase shifted local oscillator signal. Distortion in the mixed output signal is thereby reduced.

REFERENCES:
patent: 6317590 (2001-11-01), Nash et al.
patent: 6369641 (2002-04-01), McNamara et al.
patent: 6397044 (2002-05-01), Nash et al.

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