Ultra high density series-connected transistors formed on separa

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257368, 257383, H01L 2976, H01L 31036, H01L 31112

Patent

active

058180699

ABSTRACT:
A three-dimensional integrated circuit and fabrication process is provided for producing active and passive devices on various levels of the integrated circuit. The present process is particularly suited to interconnecting a source of one transistor to a drain of another to form series-connected transistors often employed in core logic units. A junction of an underlying transistor can be connected to a junction of an overlying transistor, with both transistors separated by an interlevel dielectric. The lower transistor junction is connected to the upper level transistor junction using a plug conductor. The plug conductor and, more specifically, the mutually connected junction, is further coupled to a laterally extended interconnect. The interconnect extends from the mutual connection point of the plug conductor to a substrate of the overlying transistor. Accordingly, the source and substrate of the overlying transistor can be connected to a drain of the underlying transistor to not only achieve series-connection but also to connect the source and substrate of an internally configured transistor for the purpose of reducing body effects.

REFERENCES:
patent: 4381201 (1983-04-01), Sakurai
patent: 4630089 (1986-12-01), Sasaki et al.
patent: 4669062 (1987-05-01), Nakano
patent: 4679299 (1987-07-01), Szluk et al.
patent: 4698659 (1987-10-01), Mizutani
patent: 5172203 (1992-12-01), Hayashi
patent: 5365081 (1994-11-01), Yamagaki et al.
patent: 5483083 (1996-01-01), Meguro et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Ultra high density series-connected transistors formed on separa does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Ultra high density series-connected transistors formed on separa, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ultra high density series-connected transistors formed on separa will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-81127

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.