Ultra high density integrated circuit packages

Details Ultra high density integrated circuit packages Ultra high density integrated circuit packages

1995-05-08

1996-08-27

Thompson, Gregory D.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

257787, H05K 700, H01L 2328

Patent

active

055507115

ABSTRACT:
Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element may be reduced or eliminated in part to thin the level-one package provided any necessary steps are taken to ensure the integrity of the package. Moisture-barriers, as an example, may be provided to the upper and/or lower surfaces of the thin level-one package. Additionally, a thin level-one package may also be constructed with one or more metal layers to prevent warpage. These level-one packages may be aligned in a stacked configuration to form a thin and durable horizontal level-two package. Various thermal conductors may be thermally coupled to the level-two package to help dissipate heat.

REFERENCES:
patent: 3436604 (1966-04-01), Hyltin et al.
patent: 3614546 (1971-10-01), Avins
patent: 3713893 (1973-01-01), Shirland
patent: 3739462 (1973-06-01), Hasty
patent: 3746934 (1973-07-01), Stein
patent: 4103318 (1978-07-01), Schwede
patent: 4158745 (1979-06-01), Keller
patent: 4222516 (1980-09-01), Badet et al.
patent: 4241493 (1980-12-01), Andrulitis et al.
patent: 4288841 (1981-09-01), Gogal
patent: 4321418 (1982-03-01), Dran et al.
patent: 4437235 (1984-03-01), McIver
patent: 4451973 (1984-06-01), Tateno et al.
patent: 4501960 (1985-02-01), Jouvet et al.
patent: 4521828 (1985-06-01), Fanning
patent: 4525921 (1985-07-01), Carson et al.
patent: 4530152 (1985-07-01), Roche et al.
patent: 4630172 (1986-12-01), Stenerson et al.
patent: 4633573 (1987-01-01), Scherer
patent: 4680617 (1987-07-01), Ross
patent: 4684975 (1987-08-01), Takiar et al.
patent: 4722060 (1988-01-01), Quinn et al.
patent: 4733461 (1988-03-01), Nakano
patent: 4763188 (1988-08-01), Johnson
patent: 4796078 (1989-01-01), Phelps, Jr. et al.
patent: 4821148 (1989-04-01), Kobayashi et al.
patent: 4823234 (1989-04-01), Konishi et al.
patent: 4829403 (1989-05-01), Harding
patent: 4833568 (1989-05-01), Berhold
patent: 4839717 (1989-06-01), Phy et al.
patent: 4855868 (1989-08-01), Harding
patent: 4862245 (1989-08-01), Pashby et al.
patent: 4862249 (1989-08-01), Carlson
patent: 4878106 (1989-10-01), Sachs
patent: 4884237 (1989-11-01), Mueller et al.
patent: 4888307 (1989-12-01), Spairisano et al.
patent: 4891789 (1990-01-01), Quattrini et al.
patent: 4948645 (1990-08-01), Holzinger et al.
patent: 4953005 (1990-08-01), Carlson et al.
patent: 4953060 (1990-08-01), Lauffer et al.
patent: 4956694 (1990-09-01), Eide
patent: 4994411 (1991-02-01), Naito et al.
patent: 4997517 (1991-03-01), Parthasarathi
patent: 5014113 (1991-05-01), Casto
patent: 5016138 (1991-05-01), Woodman
patent: 5041015 (1991-08-01), Travis
patent: 5049527 (1991-09-01), Merrick et al.
patent: 5057906 (1991-10-01), Ishigami
patent: 5065277 (1991-11-01), Davidson
patent: 5086018 (1992-02-01), Conru et al.
patent: 5089876 (1992-02-01), Ishioka
patent: 5099393 (1992-03-01), Bentlage et al.
patent: 5108553 (1992-04-01), Foster et al.
patent: 5138430 (1993-08-01), Gow, III et al.
patent: 5138434 (1992-08-01), Wood et al.
patent: 5139969 (1992-08-01), Mori
patent: 5147822 (1992-09-01), Yamazaki et al.
patent: 5151559 (1992-09-01), Conru et al.
patent: 5155063 (1992-10-01), Tada
patent: 5200362 (1993-04-01), Lin et al.
patent: 5214845 (1993-06-01), King et al.
patent: 5223739 (1993-06-01), Katsumata et al.
patent: 5264990 (1993-11-01), Venambra
Licari et al "Over coating Process Seals High-Rel Plastic Package Devices", Electronics Packaging, Mar. 1995, pp. 26-27.
Information allegedly written by Emory Garth regarding "Memory Stacks," Applicant received a facsimile from Emory Garth on Jan. 26, 1993, Applicant does not know when this information was written or its validity.
Catalog of Dense-Pac Microsystems, Inc. describing two products: DPS512X16A3 Ceramic 512K X 16 CMOS SRAM Module and DPS512X16AA3 High Speed Ceramic 512K X 16 CMOS SRAM Module, pp. 865-870.

Affiliated with

Also associated with

Rating

Ultra high density integrated circuit packages does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Ultra high density integrated circuit packages, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ultra high density integrated circuit packages will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1060190