Ultra high density integrated circuit package

Details Ultra high density integrated circuit package Ultra high density integrated circuit package

1995-01-20

1996-08-06

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

257685, 257686, 257687, 257659, 257660, H01L 23552, H01L 2328, H01L 2302, H01L 2322

Patent

active

055436641

ABSTRACT:
An ultra-thin level-one integrated circuit package with improved moisture penetration characteristics manufactured using a transfer molded casing with metallic lamination layers is provided. Additionally, a method and apparatus for providing a multiple-element modular package including a plurality of such level-one packages in horizontal or vertical stack configuration is provided.

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Information allegedly written by Emory Garth regarding "Memory Stacks," Applicant received a facsimile from Emory Garth on Jan. 26, 1993, Applicant does not know when the information was written or its validity.
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"Vertically-Integrated Package," Abstract, Alvin Weinberg, W. Kinzy Jones, IEEE, pp. 436-443.
"3D Interconnection For Ultra-Dense Multichip Modules," Abstract, Christin VAL, IEEE, pp. 540-547.

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