Ultra high availability clock chip

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural oscillators controlled

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331 1A, 331 18, 331 46, 331 74, 327147, 327292, 327298, H03B 2800, H03L 700, H03L 707

Patent

active

055680976

ABSTRACT:
A single reliable clock source that can be shared by all cards in a multiple card assembly. The clock delivers synchronous clock signals, so that there is no longer a need to provide crystal oscillators on each card, instead, a single non-interruptable clock source is shared by all cards. The clock is an Application Specific Integrated Circuit (ASIC), where single sources of failure have been removed by using redundant connection and majority logic. Thus, a plurality of selection means are redundantly coupled to receivers for selecting an oscillator signal to provide to phase-locked oscillators. Further, majority logic voters are redundantly coupled to the phase-locked oscillator to provide a clock output signal reflecting the state of the majority of the phase-locked oscillator signals. The clock includes three independent crystal oscillators, one clock ASIC, the wire and connectors which deliver the signals, and a 2.times.3 AND-OR majority logic on the receiving card. Each customer of the clock ASIC receives three signals from the clock ASIC and votes the three signals to create a local clock. Thus, failures at individual points do not prevent the delivery of the clock signal.

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