UART emulator card

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Details

3952002, 395500, 395872, 395878, 395882, 395884, G06F 1300

Patent

active

056048700

ABSTRACT:
An interface device (102) and corresponding method for coupling a peripheral controller (117) to a host computer (100), the interface device including an emulated universal asynchronous receiver transmitter (UART) (113) for the host computer. The interface device further includes a plurality of registers (203), preferably a control (215), status (227), and data register, such as a multi-register data buffer (401), corresponding to the registers of a UART, a host computer port (112), preferably compatible with a PCMCIA standard, that includes an address map for the plurality of registers (203), a peripheral controller port (114) providing an address mapped parallel interface to the plurality of registers (203), and control logic (207) for providing status signals, including UART status signals, to the host computer port and to the peripheral controller port. The interface device may further include a pacing circuit (303) for substantially emulating, preferably dependent on a baud rate of the data information, the timing limitations of the UART.

REFERENCES:
patent: 4823312 (1989-04-01), Michael et al.
patent: 5117500 (1992-05-01), Davis et al.
patent: 5140679 (1992-08-01), Michael
patent: 5170470 (1992-12-01), Pindar et al.
patent: 5199105 (1993-03-01), Michael
patent: 5375051 (1994-12-01), Decker et al.
patent: 5412795 (1995-05-01), Larson

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