Two-wire bus system comprising a clock wire and a data wire for

Details Two-wire bus system comprising a clock wire and a data wire for Two-wire bus system comprising a clock wire and a data wire for

1993-01-14

1996-09-24

Black, Thomas G.

Communications: electrical

Continuously variable indicating

With meter reading

370 54, 370 99, H04L 700, H03M 1300, G06F 1110

Patent

active

055595022

ABSTRACT:
Two-wire bus system comprises a clock wire and a data wire for interconnecting a number of stations and allowing both long-format and short-format slave addresses. A communication bus system has a single clock wire and a single data wire. Each wire has wired logic that upon presentation of any prevalence logic signal value imparts to that wire the prevalence logic value regardless of any non-prevalence value second presented thereto. The system has clock synchronization by a master station of any information transmission. The system arbitrates among coexistent prospective masters to select a single actual master. The protocol has a start condition by presenting said first value to the data wire with the clock line at the second value, and generates any subsequent data wire transition exclusively under existence of the prevalence value on the clock wire. The subsequent stop condition is represented by a transition to the second value on the data wire with the clock wire at the second value. The message format has an initial byte accommodating either a short slave address, or alternatively both a control signal indicating a long-format slave address inclusive of a high significance address part, to be followed in the next byte by a low significance part of the address. For enhancing the bit rate, the system has a switched pull up device, whereas furthermore each station has a slope controlled output stage.

REFERENCES:
patent: 4689740 (1987-08-01), Moelands et al.
patent: 4811365 (1986-11-01), Manno
patent: 5040174 (1991-08-01), Takeuchi et al.
patent: 5138634 (1992-08-01), Knapp
patent: 5341370 (1994-08-01), Nuhn et al.
Philips Semiconductors, Eindhoven, The Netherlands, Jan. 1992, No. 939839340011.

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