Two-step parallel analog to digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341159, 341120, 341110, H03K 1302, H03M 136

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048750484

ABSTRACT:
In a two-step parallel analog to digital converter of the type in which a first flash-type A/D converter determines the upper significant bits of a digital signal output having a desired number of bits and after a quantizing error of the first flash-type A/D converter has been determined from the difference between a value obtained by reconverting the upper significant bits to an analog value and the input analog value a second flash-type A/D converter subjects the quantizing error to A/D conversion to determine a digital output of the remaining lower significant bits, a gain correcting circuit is additionally provided to automatically establish a gain of a D/A converter for reconverting the upper significant bits to an analog value on the basis of a reference voltage applied to the first flash-type A/D converter. Moreover, a reference voltage generating circuit is additionally provided to establish upper and lower reference voltages of a second flash-type A/D converter for determining lower significant bits on the basis of the step voltage of the DAC output.

REFERENCES:
patent: 4227183 (1980-10-01), Nimomiya
patent: 4559523 (1985-12-01), Wakita
patent: 4612533 (1986-09-01), Evans
patent: 4639715 (1987-01-01), Doluca
patent: 4763106 (1988-08-01), Gulczynski
patent: 4774498 (1988-09-01), Traa
IEEE International Conference on Consumer Electronics, Watanabe et al., Jun. 1984, pp. 150-151.

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