Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1995-04-28
2000-05-30
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438785, H01L 21302
Patent
active
06069081&
ABSTRACT:
A method of planarizing a dielectric coating applied over an underlying structure on an integrated circuit wafer employs a two-step chemical mechanical polishing (CMP) process. The underlying structure is characterized as having elevated areas and recessed areas. The wafer can be prepared by applying a first polish stop on the elevated areas, then depositing a layer of dielectric over at least the recessed areas, and finally depositing a second polish stop over the resulting dielectric coating. In some applications a first polish stop is not required. The first step in the two-step CMP is polishing the second polish stop using a slurry that polishes the second polish stop until the second polish stop is substantially removed over the elevated areas. The second step is polishing the dielectric coating that remains using a second slurry that polishes the dielectric at a faster rate than it polishes either the second or first polish stop.
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Kelleher Kathryn Helen
Peschke Matthias
Yano Hiroyuki
International Buiness Machines Corporation
Kabushiki Kaisha Toshiba
Neff, Esq. Daryl K.
Siemens Components Inc.
Utech Benjamin L.
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