Two-stage decimation filter

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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3647241, H03M 300

Patent

active

054500834

ABSTRACT:
A digital filter includes a pre-filter cascaded to a low pass filter. The pre-filter has a transfer function providing generally increasing attenuation with increasing frequency above a cutoff frequency. The low pass filter has a transfer function providing substantially decreasing attenuation with increasing frequency above the cutoff frequency. The low pass filter is an FIR filter including coefficients restricted to the set {+1, 0 and -1}. The filters are preferably implemented using simple hardware such as addressable read/write RAM, digital adder/subtracters, and registers. Alternatively, the addressable RAM can be replaced with shift registers. Such a filter is easily and economically implemented and has a favorable overall frequency response characteristic. The filter is, therefore, well suited for use in many digital applications and, in particular, for use as a decimation filter in an oversampled, multi-bit, high order analog-to-digital converter system.

REFERENCES:
patent: 4940977 (1990-07-01), Mandell
patent: 4972436 (1990-11-01), Halim et al.
patent: 5079734 (1992-01-01), Riley
patent: 5212659 (1993-05-01), Scott et al.
Leung, B. H., "Design Methodology of Decimation Filters for Over-sampled ADC Based on Quadratic Programming", IEEE Transactions on Circuits and Systems, 38, No. 10, pp. 1121-1132, Oct., 1991.
Noonan, J. P. et al., "Data Compression of A +1, -1 and 0 Representation", IEEE, pp. 304-305, 1989.
Ping Wah Wong and Robert M. Gray, "FIR Filters with Sigma-Delta Modulation Encoding", IEEE Transactions on Acoustics, Speech, and Signal Processing, vol. 38, No. 6, Jun. 1990.

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