Two-phase CCD imager cell for TV interlace operation

Details Two-phase CCD imager cell for TV interlace operation Two-phase CCD imager cell for TV interlace operation

1987-12-17

1991-02-19

Munson, Gene M.

Electrical pulse counters, pulse dividers, or shift registers: c

Charge transfer device

Compensating for or preventing signal charge deterioration

357 24, 357 30, 35821326, 35821319, G11C 1928, H01L 2978, H01L 2714, H04N 314

Patent

active

049950614

ABSTRACT:
A CCD imager cell (36, 38) is formed at a face of a semiconductor substrate (10) and has first (36) and second (38) phase regions. A first clocked well (14) is provided for receiving charge integrated in the first phase region (36). A second clocked well (16) is provided for receiving charge integrated in a second phase region (38) adjacent the first phase region (36). A first gate (20) is insulatively disposed over the first clocked well (14), and a second gate (22) is insulatively disposed over the second clocked well (16). A controller controls .phi..sub.1 and .phi..sub.2 pulses such that the charge is transferred from a selected one of the first and second clocked wells (14, 16) to the other, thus integrating all of the charge in the cell into one clocked well thereof. This unified charge is then transferred out from clocked well to clocked well.

REFERENCES:
patent: 3932775 (1976-01-01), Kosonocky
patent: 4229752 (1980-10-01), Hynecke
patent: 4362575 (1982-12-01), Wallace
patent: 4513313 (1985-04-01), Kinoshita et al.
patent: 4733406 (1988-03-01), Kinoshita et al.

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