Two-phase bootstrapped CMOS switch drive technique and circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override

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H03K 1716

Patent

active

061183261

ABSTRACT:
A circuit that produces a gate drive voltage for a MOS transistor switch, that receives an input voltage "on" a source terminal, includes a first input that receives the input voltage, a second input that receives a bias voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the input voltage and the bias voltage during a first of first and second non-overlapping time intervals. A second switch connects the voltage storage element to increase the sampled voltage by another of the input voltage and the bias voltage to the gate drive voltage during the second non-overlapping time interval, while maintaining the gate drive voltage less than a breakdown voltage of the MOS transistor switch. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch such that a gate-to-source voltage of the MOS transistor switch is maintained approximately constant.

REFERENCES:
patent: 4527047 (1985-07-01), Donaldson et al.
patent: 4734599 (1988-03-01), Bohac, Jr.
patent: 5065049 (1991-11-01), Jang
patent: 5084634 (1992-01-01), Gorecki
patent: 5170075 (1992-12-01), deWit
patent: 5172019 (1992-12-01), Naylor et al.
patent: 5179296 (1993-01-01), Ito
patent: 5216290 (1993-06-01), Childers
patent: 5241502 (1993-08-01), Lee et al.
patent: 5500612 (1996-03-01), Sauer
patent: 5519340 (1996-05-01), Rybicki et al.
patent: 5581455 (1996-12-01), Rossi et al.
patent: 5594380 (1997-01-01), Nam
patent: 5621348 (1997-04-01), Furutani et al.
patent: 5640118 (1997-06-01), Drouot
patent: 5689208 (1997-11-01), Nadd
Nonideal Effects in Switched-Capacitor Circuits from Analog MOS Integrated Circuits for Signal Processing, Gregorian et al., 1986, pp. 516-517 only.
A 10-bit, 20-MS/s, 35-mW Pipeline A/D Converter, Thomas B. Cho et al., IEEE 1994 Integrated Circuits Conference, pp. 499-502.

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