Two-phase boosted CMOS switch drive technique and circuit

Details Two-phase boosted CMOS switch drive technique and circuit Two-phase boosted CMOS switch drive technique and circuit

1997-11-06

1999-08-31

Ton, My-Trang Nu

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327 91, 327390, G05F 110, G05F 302

Patent

active

059458720

ABSTRACT:
A circuit that produces a gate drive voltage for a MOS transistor switch includes an input that receives a supply voltage, a regulated voltage generating circuit that produces a regulated voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the supply voltage and the regulated voltage during a first of first and second non-overlapping time intervals. The second switch connects the voltage storage element to increase the sampled voltage by another of the supply voltage and the regulated voltage to the gate drive voltage during the second non-overlapping time interval. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch during the second non-overlapping time interval. The regulated voltage generating circuit produces the regulated voltage such that a high level of the gate drive voltage exceeds the supply voltage yet is maintained less than a breakdown voltage of the MOS transistor switch.

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Nonideal Effects in Switched-Capacitor Circuits from Analog MOS Integrated Circuits for Signal Processing, Gregorian et al., 1986, pp. 516-517 only.
A 10-bit, 20-MS/s, 35-mW Pipeline A/D Converter, Thomas B. Cho et al., IEEE 1994 Custom Integrated Circuits Conference, pp. 499-502.

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