Two-mask trench schottky diode

Details Two-mask trench schottky diode Two-mask trench schottky diode

2001-05-22

2004-05-25

Hu, Shouxiang (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Schottky barrier

With means to prevent edge breakdown

C257S484000, C438S570000, C438S576000

Reexamination Certificate

active

06740951

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to rectifiers and more particularly to Schottky barrier rectifying devices, and methods of forming these devices.
BACKGROUND OF THE INVENTION
Power devices typically include an active region and a termination region at the periphery of the active region to prevent premature voltage breakdown. Conventional termination structures include local oxidation of silicon (LOCOS), field plate, guard ring, or a combination thereof. Because large electric fields can arise in the vicinity of the LOCOS, a significant leakage current may flow through leakage paths in the termination region. A conventional approach to reducing such leakage currents is shown in FIG.
1
.
FIG. 1
shows a substrate
12
on which a trench Schottky rectifier is formed. The device includes an active region
5
and a termination region
10
. The semiconductor substrate
12
has a first conductivity type, typically N-type conductivity, on which an epitaxial layer
20
is formed. Epitaxial layer
20
is also of the first conductivity type and more lightly doped than substrate
12
. A series of trenches
30
are formed in the active region
5
of the device. The trenches are lined with a gate oxide layer
25
and filled with doped polysilicon. The polysilicon filled trenches
30
are continuously connected over the surface of the structure. A LOCOS region
40
is formed in the termination region
10
to isolate the active region
5
from the termination region
10
. The LOCOS region
40
extends to the boundary defining the active region
5
and the termination region
10
.
A p+ doped region
50
is formed below LOCOS region
40
by ion implantation and diffusion. Doped region
50
enhances the reverse-biased voltage so that pinch-off is maintained in the termination region
10
, thus eliminating a path through which leakage current can be conducted. A metal anode layer
55
is formed over the exposed surfaces of the polysilicon-filled trenches
30
and epitaxial layer
20
in the active region
5
and over the LOCOS region
40
in the termination region.
Unfortunately, the device shown in
FIG. 1
is relatively complex and expensive to manufacture because three lithographic masking steps are involved. Specifically, a separate masking step is required to form the trenches, p+doped region, and contacts.
Accordingly, it would be desirable to provide a structure for a trench Schottky diode in which premature voltage breakdown arising from leakage currents is avoided and which can be manufactured with less than three lithographic masking steps.


REFERENCES:
patent: 4646115 (1987-02-01), Shannon et al.
patent: 4862229 (1989-08-01), Mundy et al.
patent: 5365102 (1994-11-01), Mehrotra et al.
patent: 5612567 (1997-03-01), Baliga
patent: 6078090 (2000-06-01), Williams et al.
patent: 6309929 (2001-10-01), Hsu et al.
patent: 2001/0010385 (2001-08-01), Hijzen et al.

Affiliated with

Also associated with

Rating

Two-mask trench schottky diode does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Two-mask trench schottky diode, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Two-mask trench schottky diode will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3266486