Two-level threshold circuitry for large scale integrated circuit

Details Two-level threshold circuitry for large scale integrated circuit Two-level threshold circuitry for large scale integrated circuit

1981-02-17

1984-03-06

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307360, 307450, 307473, G01R 19165, H03K 524, H03K 19017

Patent

active

044356587

ABSTRACT:
This disclosure relates to circuitry which includes a low threshold detector and a high threshold detector in the form of inverters the respective output signals of which are combined in such a manner that the output signal of the circuitry is a function of the input signal rising above a low threshold and remaining in an on condition until the input signal has risen above a high threshold and then declined below it. In addition, the circuitry includes a circuit memory element in which is stored the last stable state of the circuitry so that if noise or transients should occur on the input line, the circuitry can return to that stable state. This circuit enables the rapid detection of a memory readout even though the signals on the memory sense lines have relatively slow rise and fall times due to the capacitances on those lines which in turn are due to the large number of memory cells involved. Furthermore, the disclosed invention can be employed in any system in which switching speed is of importance.

REFERENCES:
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patent: 3950656 (1976-04-01), Sumida et al.
patent: 3952213 (1976-04-01), Fukaya
patent: 3956708 (1976-05-01), Musa
patent: 3969633 (1976-07-01), Paluck et al.
patent: 4069432 (1978-01-01), Bazin
patent: 4100429 (1978-07-01), Adachi
patent: 4179691 (1979-12-01), Keller

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