Two-level cache memory system

Details Two-level cache memory system Two-level cache memory system

1993-05-10

1994-04-26

Lall, Parshotam S.

Boots, shoes, and leggings

395400, 364DIG1, 36424345, 36424341, G06F 1208

Patent

active

053074777

ABSTRACT:
A two-level cache memory system for use in a computer system including two primary cache memories, one for storing instructions and one for storing data. The system also includes a secondary cache memory for storing both instructions and data. The primary and secondary caches each employ their own separate tag directory. The primary caches use a virtual addressing scheme employing both virtual tags and virtual addresses. The secondary cache employs a hybrid addressing scheme which uses virtual tags and partial physical addresses. The primary and secondary caches operate in parallel unless the larger and slower secondary cache is busy performing a previous operation. Only if a "miss" is encountered in both the primary and secondary caches does the system processor access the main memory.

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