Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With enlarged emitter area
Reexamination Certificate
2006-09-12
2006-09-12
Weiss, Howard (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With enlarged emitter area
Reexamination Certificate
active
07105913
ABSTRACT:
A technique for fabricating a patterned resistor on a substrate produces a patterned resistor (101, 801, 1001, 1324, 1374) including two conductive end terminations (110, 810, 1010) on the substrate, a pattern of first resistive material (120, 815, 1015) having a first width (125) and a first sheet resistance, and a pattern of second resistive material (205, 820, 1020) having a second width (210) and a second sheet resistance that at least partially overlies the pattern of first resistive material. One of the first and second sheet resistances is a low sheet resistance and the other of the first and second resistances is a high sheet resistance. A ratio of the high sheet resistance to the low sheet resistance is at least ten to one. The pattern having the higher sheet resistance is substantially wider than the pattern having the low sheet resistance. The patterned resistor can be precision trimmed1225.
REFERENCES:
patent: 5976943 (1999-11-01), Manley et al.
patent: 6534743 (2003-03-01), Swenson et al.
patent: 1 261 241 (2002-05-01), None
patent: WO 00/56128 (2000-09-01), None
Dunn, Gregory J. “Three-Ply Foil for Fabrication of Embedded Resistors” Jan. 2002 WWW.IP.COM.
Carney Scott N.
Dunn Gregory J.
Savic Jovica
Motorola Inc.
Trinh (Vikki) Hoa B.
Weiss Howard
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