Two-dimensional inverse discrete cosine transformation circuit f

Details Two-dimensional inverse discrete cosine transformation circuit f Two-dimensional inverse discrete cosine transformation circuit f

1997-09-18

1999-11-02

Boudreau, Leo H.

Image analysis

Image compression or coding

Parallel coding architecture

382250, 382277, 348403, 348420, 358432, G06K 936

Patent

active

059785080

ABSTRACT:
A two-dimensional inverse discrete cosine transformation circuit of an MPEG2 video decoder including a one-dimensional inverse discrete cosine transformation circuit, an input switching circuit for receiving input of new data and data already subjected to first one-dimensional inverse discrete cosine transformation and sending one of them to the one-dimensional inverse discrete cosine transformation circuit, an input switching control circuit for controlling the input switching circuit so as to alternately and continuously output data output from a first serial-parallel conversion circuit and data output from a second serial-parallel conversion circuit, and a data allocation circuit for switching and controlling an output destination of output data of the one-dimensional inverse discrete cosine transformation circuit based on the timing of switching by the input switching control circuit.

REFERENCES:
patent: 5054103 (1991-10-01), Yasuda et al.
patent: 5339315 (1994-08-01), Maeda et al.
patent: 5594679 (1997-01-01), Iwata

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