Two clock boot circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307578, 307482, H03K 502, H03K 5135

Patent

active

046894969

ABSTRACT:
A plurality of circuit embodiments, implemented in MOS, for receiving two non-overlapping clock signals provide a booting function to each clock signal and in response to respective control signals directs one or the other of the booted clock signals to a single output line. The control signal for the first clock can change during the alternate second clock time and is stable during the first clock time. Similarly, the control signal for the second clock can change during the alternate first clock time and is stable during the second clock time. For both control signals, a low level enables the respective boot circuit.

REFERENCES:
patent: 4352996 (1982-10-01), White, Jr.
patent: 4431927 (1984-02-01), Eaton, Jr. et al.
patent: 4443720 (1984-04-01), Takemae
patent: 4472644 (1984-09-01), Kirsch
patent: 4540898 (1985-09-01), Pumo et al.
patent: 4574203 (1986-03-01), Baba

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