Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2006-10-03
2006-10-03
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185160
Reexamination Certificate
active
07116577
ABSTRACT:
A non-volatile electrically erasable programmable read only memory (EEPROM) capable of storing two bit of information having a nonconducting charge trapping dielectric, such as silicon nitride, sandwiched between two silicon dioxide layers acting as electrical insulators is disclosed. A left and a right bit are stored in physically different areas of the charge trapping layer, near left and right regions of the memory cell, respectively. Two bits are able to be programmed and read due to a combination of relatively low gate voltages with reading in the reverse direction. This greatly reduces the potential across the trapped charge region. This permits much shorter programming times by amplifying the effect of the charge trapped in the localized trapping region associated with each of the bits. In addition, both bits of the memory cell can be individually erased by applying suitable erase voltages to the gate and either left or right regions so as to cause electrons to be removed from the corresponding charge trapping region of the nitride layer.
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Eitan Law Group
Le Vu A.
Saifun Semiconductors LTD
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